Prior art attempts at designing programmable frequency synthesizers involved either the use of phase-locked loops (PLL) or preprogrammed lookup tables stored in a read-only memory (ROM). Both of these prior art techniques have serious disadvantages.
Phase-locked loops were found to be unsuitable for wide-range synthesizer applications because of their long acquisition time in this mode and because of the susceptibility of their oscillator to noise.
One prior art synthesizer which used a lookup table required a sinusoid to be digitized and programmed into a read-only memory. This synthesizer is described by Lawrence R. Rabiner and Bernard Gold, in the book entitled Theory and Application of Digital Signal Processing, published in 1975 by Prentice-Hall, Inc., Englewood Cliffs, N.J. The disadvantage of this approach was that the amount of memory and filtering required became large when low-harmonic sinusoids were desired over a wide band of frequencies. A second scheme also involving lookup tables utilized a counter to divide a known clock frequency to generate the output. The values stored in the table were compared with the output of the counter, but the values were inversely related to the frequencies actually programmed. Because of this inverse relationship, quantization errors were introduced in generating the values for the table and precise frequency increments could be obtained. Furthermore, the necessity for a custom read-only memory was a deterrent in itself if it could be otherwise avoided.
The programmable frequency synthesizer of this invention does not require a read-only memory or any other custom hardware, with the possible exception of the clock oscillator, which is an element that is required for all prior art embodiments also. A simple resistance-capacitance clock oscillator may be used if its inaccuracy is acceptable, although a crystal-controlled oscillator is recommended for precise applications.